"જે ખોયું તે માળવાનુ જરા શ્રદ્ધા રાખો, જે બગડ્યુ સુધારવાનુ જરા શ્રદ્ધા રાખો"

Vihang Naik

About

I have completed my PhD from Systems, Control, and Optimization (DYSCO) research unit, under the supervision of Prof. Alberto Bemporad at IMT School for Advanced Studies Lucca, Italy with a thesis titled ‘Mixed-Integer Quadratic Programming Algorithms for Embedded Control and Estimation‘.

I received M.Tech in Instrumentation & Control (Process Instrumentation) from Embedded Systems Lab, under the supervision of Dr. D. N. Sonawane, Dept. of Instrumentation & Control Engineering, College of Engineering, Pune (COEP), India, in 2012 and B.E. in Instrumentation & Control under the supervision of Prof. Utpal T. Pandya, from Sarvajanik College of Engineering & Technology, Surat, India in 2009.

Prior to joining IMT Lucca in 2015, I worked as an Assitant Project Engineer in Virtual Lab Project at College of Engineering, Pune (COEP), India, and as an Engineer at Embedded Systems Centre of Excellence (ES CoE), Eaton India Engineering Center (EIEC), Eaton Technologies Private Limited, Pune, India towards design and verification of FPGA based projects for Aerospace products catering to RTCA/DO-254 (Design Assurance Guidance for Airborne Electronic Hardware) standard.

 Areas of Interest

  • Embedded Mixed-Integer Quadratic Programming (MIQP)

  • Embedded hybrid model predictive control (MPC)

  • Implementation of optimization algorithms using FPGAs

  • System Identification

  • Energy Harvesting

Publications (Google Scholar Profile)

Conference Papers

Journal Papers

Project-work

  • Implementation of Quadratic Programming Solver using Interior Point Method on MATLAB.

Post “Step-by-Step Description for MATLAB+ISE Co-Simulation using System Generator for Spartan/Virtex FPGAs” has been Shared by Xilinx Inc. with title,

Vihang Naik breaks down MATLAB+ISE co-simulation using System Generator for Spartan & Virtex FPGAs in this new blog post with screen shots”   @ http://goo.gl/6EDEJ

I have been working on:

– Xilinx ISE, Xilinx CORE generator, Xilinx System Generator, ChipScope Pro, Spartan/Virtex  FPGAs

– 8051 & PIC Microcontrollers, MPLAB IDE, Keil IDE, Proteus

– MATLAB/Simulink

Header Image: 'Vihang' written in Sanskrit, means "A Bird". Photograph was taken 
at COEP Astronomy Club-Star Gazing Party, Nasrapur, Maharashtra, India, edited by 
Suchakra.